1. Field of the Invention
This invention generally relates to a process of producing a semiconductor article and, more particularly, it relates to a method of producing a semiconductor article in which a single-crystal substrate separated by the method can be reused.
2. Related Background Art
The technique of forming a single-crystal semiconductor layer on an insulator is known as Silicon on Insulator or Semiconductor on Insulator (hereinafter, totally referred to as xe2x80x9cSOIxe2x80x9d) technique and has been investigated by many researchers because devices utilizing the SOI technique have a number of advantages that cannot be obtained by bulk silicon substrates that are used for producing ordinary silicon integrated circuits. In short, the SOI technique provides the advantages of:
(1) easy dielectric isolation and feasibility to a high degree of integration;
(2) excellent radiation hardness;
(3) reduced floating capacitance and adaptability to high speed operation;
(4) capability of omitting a well step:
(5) prevention of latch-ups; and
(6) capability of producing fully depleted type field effect transistors as a result of realizing thin film formation.
Recently, T. Yonehara et al. have reported a bonded SOI that is excellent in film thickness uniformity and crystallinity and can be batch-processed (T. Yonehara et al., Appl. Phys. Lett. Vol. 64, 2108 (1994); U.S. Pat. No. 5,371,037; Japanese Patent Application Laid-Open No. 5-21338).
FIGS. 12A, 12B, 12C, 12D and 12E are schematic sectional views showing the steps of a conventional method of producing a semiconductor article. As shown in FIG. 12A, a porous layer 2 is formed on a surface of an Si substrate 1. As shown in FIG. 12B, a non-porous single-crystal Si layer 3 is epitaxially grown on the porous layer 2. Then, an silicon oxide 5 is formed thereon. Next, as shown in FIG. 12C, the first substrate 1 and a second substrate 4 are bonded to each other.
Then, as shown in FIG. 12D, the first substrate 1 is made thin from the rear side by a technique such as grinding or the like to make the porous layer 2 exposed over the entire surface of the substrate. The exposed porous layer 2 is then etched and removed by a selective etching solution such as HF+H2O2 or the like. Since the etch selectivity of the porous Si layer 2 relative to the bulk Si (non-porous single-crystal Si) can be made as high as 100,000, the non-porous single-crystal Si layer formed on the porous layer 2 can be left on the second substrate 4 to form an SOI substrate without reducing the thickness of the non-porous single-crystal Si layer (see FIG. 12E).
However, a semiconductor substrate produced by way of the bonding process inevitably requires two wafers, one of which is substantially wasted away by grinding, polishing, etching, or the like.
In order to fully enjoy the advantages of the bonded SOI, there is a continuing need for a process that can produce a high quality SOI substrate with excellent reproducibility and enable the reuse of a prime wafer to attain resource saving and reduction of the production cost. Under such circumstances, Sakaguchi et al. have recently reported a process of reusing a first substrate to be wasted out in the bonding process (Japanese Patent Application Laid-Open No. 7-302889; U.S. Pat. No. 5,856,229).
The uniformity of resistivity of the CZ wafers as silicon substrates which are commercially available easily and inexpensive is relatively good in each wafer but is not satisfactory between wafers. For instance, there is generally used a specification with a variation of xc2x130-50% such as 0.01-0.02 xcexa9cm. The specification with a range results from the controllability of variance of resistivity within an ingot. Therefore, when the acceptable value as to variance in resistivity between wafers is to be narrowed, the yield of wafers obtained from one ingot is decreased, thus resulting in an increase of the production cost.
On the other hand, in the steps of forming a porous silicon layer on a surface of a silicon substrate and separating a pair of substrates as bonded in the porous silicon layer, controlling the structure of the porous layer is important in two points.
A first point is the control of the crystallinity of the single-crystal layer as the SOI layer. The crystallinity is greatly influenced by the structure of the porous layer.
That is, silicon materials of different resistivities will form porous layers with different structures, which will affect the density of crystal defects introduced into the non-porous single-crystal layers to be formed thereon. For example, when a porous silicon layer is formed on a substrate doped with boron in about 1018/cm3, and an epitaxial silicon layer is formed thereon by the CVD method, a substrate with a resistivity of 0.013 xcexa9cm and a substrate with a resistivity of 0.017 xcexa9cm provide crystal defect densities of the epitaxial silicon layers as the SOI layers which are different from each other on the order of about 101.
A second point is the control of the separability. A porous structure suitable for the separation is, for example, a porous layer with a high porosity. However, a high porosity means in most cases that the side walls of the pores are thin, and too high a porosity will results in peeling off at the porous layer prior to the separation, which poses a problem in the step stability.
Especially, the increase of the pore diameters of the porous material is complementary to the decrease of the pore wall thickness, and in case of a high porosity layer, the affection of the change in resistivity, i.e., the change in impurity concentration on the porosity is larger than that in case of a low porosity layer.
Japanese Patent Application Laid-Open Nos. 9-102594 and 10-200078 disclose a method of diffusing an impurity such as boron, etc. to form a uniform porous layer in a low-grade Si substrate with good reproducibility.
The method is described with reference to FIGS. 13A, 13B, 13C, 13D, and 13E.
As shown in FIG. 13A, a doped layer 11 is formed by diffusion or epitaxial growth on a surface of a silicon wafer 1 as a prime wafer.
As shown in FIG. 13B, the silicon substrate 1 having the doped layer 11 is subjected to anodization to form a porous region 2. Since the pore formation is carried out such that the thickness t2 of the porous region 2 is larger than the thickness t1 of the doped layer 11, the porous region 2 consists of two layers 12 and 13 having different porosities from each other.
As shown in FIG. 13C, a non-porous layer 3 is epitaxially grown on the porous region 2, and an insulating layer 5 is formed on a surface thereof.
As shown in FIG. 13D, the insulating layer 5 is bonded to a support substrate 4 to make a bonded substrate.
As shown in FIG. 13E, an external force is applied so as to separate the bonded substrate to generate a crack in the porous region 2, thus effecting separation into two members.
Removing the remaining porous layer 12 and smoothing the exposed surface provides an SOI substrate.
The separated silicon substrate 1, when subjected to removal of the remaining porous layer 13 and smoothing of the exposed surface, can be reused as a silicon wafer (prime wafer) 1 not made porous.
However, since at least the porous layer 13 is obtained by making porous the surface of the original silicon substrate 1, the silicon substrate 1 subjected to the removal of the remaining porous layer 13 is in thickness that the original substrate.
Further, when the impurity concentrations of the used silicon substrates themselves differ from one another, the obtained porous layers 13 are nonuniform ones.
When the separated substrate 1 is to be reused, it is preferable that the quality thereof is suitable for bonding as with the original substrate, and further that the quality of the non-porous single-crystal layer formed on the porous layer is at least not inferior to the quality of that formed on the original substrate 1.
The treatment for making the separated substrate 1 reutilizable is referred to as xe2x80x9creclaimingxe2x80x9d. The thickness of the reclaimed substrate 1 is reduced at least by the thickness of the porous layer transferred to the support substrate 4 in the separation. In addition, removing the porous layer at the substrate 1 side reduces the thickness of the substrate 1 by the thickness of the portion originally made porous.
Further, when the removal of the porous layer is followed by polishing or the like as the surface flattening treatment of the substrate 1, the thickness of the substrate 1 is further reduced including the reduction in thickness due to the polishing of the porous layer. That is, when reutilized n times, and when the reduction in thickness for each reutilization is defined as t, the thickness of the substrate 1 is reduced by n xc3x97 t.
Therefore, the number of times of reutilization of the substrate 1 is at most limited within such a range that the thickness of the substrate 1 is not less than a thickness sufficient to withstand the substrate transportation during the semiconductor substrate production process.
Further, it has been frequently reported that when forming the porous layer on the substrate 1, a warpage is found in the semiconductor substrate having the porous layer formed thereon. The warpage is defined by the thicknesses of the porous layer and the substrate 1 as well as the structure of the porous layer. The smaller the thickness of the substrate 1, the larger the warpage.
In the case of the method of bonding a substrate and a support substrate to each other without use of an adhesive, the substrate surfaces are made opposite to each other, are brought into contact with each other and bonded by the Van der Waals force. In this case, an excessively large warpage hinders the bonding.
Further, when adopting the method of effecting separation by application of an external mechanical force, the optimal values of separating conditions vary depending on the substrate thickness, so that substrates as made thin by the regeneration are required to be processed separately from the original substrates.
That is, when n times of regeneration is possible, n kinds of separating conditions need to be set at the maximum. Further, substrates of different thicknesses can not be processed together, and introducing reclaimed substrates into the production makes the process at the production site complicated.
As the substrate for forming a porous layer, it is preferable to use the CZ substrates which are inexpensive and easily available as described above.
The nonuniformity of impurity concentration in an ingot resulting from an impurity concentration nonuniformity generated at the solid-liquid interface when lifting up the ingot from an Si melt by the CZ method is generally called xe2x80x9cswirlxe2x80x9d. The swirl generates a waviness-like surface unevenness along the swirl due to a difference in etch rate delicately generated by the variance of concentration during chemical mechanical polishing or chemical cleaning especially when producing a highly doped wafer.
The surface unevenness develops during the formation of a porous layer. This is because the formation rate of the porous layer is influenced by the impurity concentration, so that there is generated a distribution of the thickness or structure of the porous layer along the swirl. That is, when after removal of the porous layer, a flattening treatment is carried out by a method involving substantially no reduction of film thickness such as heat treatment in a reducing atmosphere containing hydrogen, there is formed on the surface of the reclaimed substrate a swirl-like surface unevenness which is larger than the original one.
This unevenness generates an unbonded region called xe2x80x9cvoidxe2x80x9d in the bonding step to result in lowering in the yield of the bonding step, which in turn leads to lowering in the yield of the whole steps.
In order to make small the in-plane distribution of the porous structure or thickness due to the swirl, it is effective that after a silicon wafer is made by the CZ method, an impurity is added to effect control.
The method of thermally diffusing an impurity in a surface layer of a silicon substrate by the diffusion method does not generate the in-plane distribution of the impurity concentration characteristic of the CZ method but is associated with the following problems.
For example, when a layer added with boron in about 1018/cm3 is formed in a surface of a silicon wafer in a thickness of 10 xcexcm, it takes several ten hours to effect diffusion although boron is an impurity with a relatively large diffusion coefficient. Thus, the problem of processing capacity or cost arises.
Further, when such an impurity diffused layer is to be formed in as a short period of time as possible, the concentration at a portion in the vicinity of the surface will reach 1019-1020/cm3 at the initial stage of diffusion, which may result in crystal defects due to lattice strain accompanying impurity addition at a high concentration. Further, when a higher heat treating temperature is adopted, there is a possibility that the same problem may arise, and there is a case where the substrate is contaminated with reaction pipes of the heat treating apparatus or a metallic impurity permeating through the reaction pipes.
FIGS. 14A, 14B, 14C, 14D, and 14E illustrate another process of producing a semiconductor article.
As shown in FIG. 14A, a non-porous layer 11 having a uniform impurity concentration is formed by the epitaxial growth on a surface of a silicon substrate 1 in a thickness of t3.
As shown in FIG. 14B, a surface of the non-porous layer 11 is anodized to form a porous region 2 in a thickness of t2. At this time, making higher the current density during the anodization enables a low porosity layer 12 and a high porosity layer 13 to be formed in the porous region 2. Since t3 is larger than t2 (t3 greater than t2), the non-porous layer 11 remains in part under the high porosity layer 13.
As shown in FIG. 14C, another non-porous layer 3 and an insulating layer 5 are formed thereon.
As shown in FIG. 14D, the silicon substrate 1 is bonded to a support substrate 4 to make a bonded substrate.
As shown in FIG. 14E, the bonded is separated.
Removing the remaining low porosity layer 12 provides an SOI substrate, while removing the remaining high porosity layer 13 reclaims the silicon substrate 11.
However, when forming porous layers having porosities different from each other, greatly changing the current or the HF concentration during the anodization treatment makes the production cost higher and also makes the maintenance or management complicated.
Further, there is a need for improving the porous layer removal step and the SOI layer smoothing step as compared with the prior art methods.
An object of the present invention is to provide a process of producing a semiconductor article that can form a uniform low porosity layer and a uniform high porosity layer.
Another object of the present invention is to provide a process of producing a semiconductor article that does not reduce the thickness of an original substrate for each reutilization.
Still another object of the present invention is to provide a process of producing a semiconductor article that is easy in condition setting and maintenance during anodization and can be carried out at a low operation cost.
According to a first aspect of the present invention, there is provided a process of producing a semiconductor article comprising the steps of: epitaxially growing on at least one surface of a single-crystal substrate a plurality of single-crystal semiconductor layers differing from each other in at least one of the kind (species) and the concentration of an impurity; making porous the plurality of single-crystal semiconductor layers so as to form a high porosity layer and a low porosity layer;
forming a non-porous single-crystal layer on a surface of the single-crystal semiconductor layer as made porous; and bonding the single-crystal substrate and a support substrate to each other, wherein the bonded single-crystal substrate and support substrate are separated at at least one of a location in the high porosity layer and an interface of the high porosity layer with a layer adjacent to the high porosity layer.
According to the present invention, by forming on at least one surface of a single-crystal substrate non-porous single-crystal semiconductor layers prior to porous layer formation, and forming a high porosity layer and a low porosity layer, it is possible to suppress the variance in the same substrate or between substrates of the resistivity of a region for forming the porous member.
Further, by forming a single-crystal semiconductor layer in a thickness equal to or larger than the thickness of the porous layer prior to formation of the high porosity and low porosity layers, it is possible to prevent the original thickness of a firstly provided single-crystal substrate from decreasing.
In addition, by forming the single-crystal semiconductor layer of at least two sub-layers differing from each other in at least one of the kind and the concentration of an impurity, it is possible to change the porous layer structure even under the same anodization conditions to thereby increase the reproducibility of the location for generation of a crack, thus making constant the location for separation in the porous layer and/or at the interface of the porous layer with another layer adjacent thereto.
Yet still another object of the present invention is to provide a process of producing a semiconductor article that makes it easy to remove the porous layer and to smooth a surface of the non-porous single-crystal layer transferred onto the support substrate.
According to a second aspect of the present invention, there is provided a process of producing a semiconductor article comprising the steps of: epitaxially growing a single-crystal semiconductor layer on at least one surface of a single-crystal substrate; making porous the single-crystal semiconductor layers to form a high porosity layer and a low porosity layer; forming a non-porous single-crystal layer on a surface of the high porosity layer; and bonding the single-crystal substrate and a support substrate to each other, wherein the bonded single-crystal substrate and support substrate are separated at at least one of a location in the high porosity layer and an interface of the high porosity layer with a layer adjacent to the high porosity layer.
According to a third aspect of the present invention, there is provided a process of producing a semiconductor article comprising the steps of: epitaxially growing a single-crystal semiconductor layer on at least one surface of a single-crystal substrate; effecting heat treatment in a reducing atmosphere comprising hydrogen and then making porous the single-crystal semiconductor layer so as to form a high porosity layer and a low porosity layer; forming a non-porous single-crystal layer on a surface of the high porosity layer; and bonding the single-crystal substrate and a support substrate to each other, wherein the bonded single-crystal substrate and support substrate are separated at at least one of a location in the high porosity layer and an interface of the high porosity layer with a layer adjacent to the high porosity layer.